Low Power Nonvola Voltage
نویسندگان
چکیده
This paper presents a new nonv design that incorporates low-voltag PMOS Flash transistors. The de global store, restore and erase o negligible penalty on regular SRA Store/erase operations also do not c power even considering charge Circuit simulations based on exp characteristics demonstrate that 10 operation at ± 6 V is sufficien restoration of the stored bit even und process variation.
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تاریخ انتشار 2010